diff --git a/VHDLFormatter.js b/VHDLFormatter.js index 2c26add..f955dc1 100644 --- a/VHDLFormatter.js +++ b/VHDLFormatter.js @@ -635,6 +635,10 @@ function beautify3(inputs, result, settings, startIndex, indent, endIndex) { [i, endIndex] = beautifyPortGenericBlock(inputs, result, settings, i, endIndex, indent, "GENERIC"); continue; } + if (input.regexStartsWith(/.*?\:\=\s*\($/)) { + [i, endIndex] = beautifyPortGenericBlock(inputs, result, settings, i, endIndex, indent, ":="); + continue; + } if (input.regexStartsWith(/[\w\s:]*PROCEDURE[\s\w]+\($/)) { [i, endIndex] = beautifyPortGenericBlock(inputs, result, settings, i, endIndex, indent, "PROCEDURE"); if (inputs[i].regexStartsWith(/.*\)[\s]*IS/)) { @@ -760,4 +764,4 @@ function RemoveExtraNewLines(input) { input = input.replace(/\r\n\r\n\r\n/g, '\r\n'); return input; } -//# sourceMappingURL=VHDLFormatter.js.map \ No newline at end of file +//# sourceMappingURL=VHDLFormatter.js.map diff --git a/VHDLFormatter.ts b/VHDLFormatter.ts index 3509250..738adf2 100644 --- a/VHDLFormatter.ts +++ b/VHDLFormatter.ts @@ -694,6 +694,10 @@ export function beautify3(inputs: Array, result: (FormattedLine | Format Mode = modeCache; continue; } + if (input.regexStartsWith(/.*?\:\=\s*\($/)) { + [i, endIndex] = beautifyPortGenericBlock(inputs, result, settings, i, endIndex, indent, ":="); + continue; + } if (input.regexStartsWith(/[\w\s:]*\bPORT\b([\s]|$)/)) { [i, endIndex] = beautifyPortGenericBlock(inputs, result, settings, i, endIndex, indent, "PORT"); continue;